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32 lines
2.2 KiB
TeX
32 lines
2.2 KiB
TeX
\subsubsection{Condition Codes}
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Any arithmetic operation (that is truly part of the arithmetic operations group, so not including \texttt{lea} for example) implicitly sets the \bi{condition codes}.
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The following condition codes were covered in the lecture (operation: \texttt{t = a + b}):
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\begin{itemize}
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\item \texttt{CF} (Carry Flag): Set if carry out from MSB (unsigned overflow)
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\item \texttt{ZF} (Zero Flag): Set if \texttt{t == 0}
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\item \texttt{SF} (Sign Flag): Set if \texttt{(a - b) < 0} (for signed)
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\item \texttt{OF} (Overflow Flag): Set if two's complement overflow (i.e. \verb+(a>0 && b>0 && t<0) || (a<0 && b<0 && t>=0)+)
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\end{itemize}
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\content{Explicit computation}
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In the below explanations, we always assume \texttt{src2 = b} and \texttt{src1 = a}
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To explicitly compute them, we can use the \texttt{cmpX src2, src1} (i.e. for easier understanding, \texttt{cmpX b, a}) instruction (with X again any of the size postfixes),
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that essentially computes $(a - b)$ without setting a destination register.
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When we execute that instruction, \texttt{CF} is set if \texttt{a < b} (unsigned), \texttt{ZF} is set if \texttt{a == b}, \texttt{SF} is set if \texttt{a < b} (signed)
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and \texttt{OF} is set as above, where \texttt{t = a - b}.
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Another instruction that is used is \texttt{testX src2, src1} (X again a size postfix, easier: \texttt{testX b, a}), and acts like computing \texttt{a \& b} and where \texttt{ZF} is set if \texttt{a \& b == 0}
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and \texttt{SF} is set if \texttt{a \& b < 0}.
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\inlineex Assume \texttt{x = src1}, \texttt{y = src2} in \texttt{cmpl y, x}. Then, when you use the condition codes with \texttt{cmovle},
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the instruction is executed only if $x \leq y$ (i.e. the operands of the compare instructions in the AT\&T syntax are flipped)
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\content{Zeroing register} We can use a move instruction, but that is less efficient than using \texttt{xorl reg, reg},
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where \texttt{reg} is the 32-bit version of the reg we want to zero. This works because on 32-bit operations,
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the upper 32 bit of the 64 bit register will be zeroed.
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\content{Reading condition codes} To read condition codes, we can use the \texttt{setC} instructions,
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where the \texttt{C} is to be substituted by an element of table \ref{tab:condition-codes}
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