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36 lines
2.3 KiB
TeX
36 lines
2.3 KiB
TeX
\fancydef{Architecture} Also known as ISA (Instruction Set Architecture) is ``The parts of a processor design that one needs to understand to write assembly code''.
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It includes for example the definition of instructions (and their options) and what registers are available.
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Notable examples are \texttt{x86}, \texttt{RISC-V} (this one is open-source!), MIPS, ARM, etc
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\fancydef{Microarchitecture} The implementation of the ISA. It defines the actual hardware layout and how the individual instructions are actually implemented
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and thus also defines things such as core frequency, cache layout and more.
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Thus, the ISA is more or less precisely on the boundary of the software/hardware interface.
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\inlinedef Complex Instruction Set (CISC):
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\begin{itemize}[noitemsep]
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\item Stack oriented instruction set: Uses it to pass arguments, save program counter and features explicit push and pop instructions for the stack.
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\item Arithmetic instructions can access memory
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\item Condition codes set side effect of arithmetic and logical instructions.
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\item Design Philosophy: Add new instructions for typical tasks.
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\end{itemize}
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\inlinedef Reduced Instruction Set (RISC):
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\begin{itemize}[noitemsep]
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\item Fewer, simpler instructions, commonly with fixed-size encoding. As a result, we might need more to get a given task done. On the other hand,
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we can execute them with small and fast hardware
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\item Register-oriented instruction set with many more registers that are used for arguments, return pointers, temporaries, etc.
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\item Load-Store architecture, i.e. only load and store instructions can access memory
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\item Thus: No Condition codes
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\end{itemize}
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What to choose? Both have advantages that the other has as disadvantage:
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Compiling for CISC is usually easier and usually results in smaller code size.
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For RISC however, compiler optimization can give a huge performance uplift and it can run fast with even a simple chip design.
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Today, the choices are made based on outside constraints usually. For desktops and servers, there is enough compute to make anything run fast.
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For embedded systems though, the reduced complexity of RISC makes more sense, but for how long still?
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What matters most today are non-technical factors such as existance of code for one ISA or licensing costs (and of course, Geopolitics)
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