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[SPCA] Virtual memory, Caches updated
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semester3/spca/parts/03_hw/03_caches/00_intro.tex
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semester3/spca/parts/03_hw/03_caches/00_intro.tex
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\subsection{Caches}
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Processors generally improve quicker than memory speed does. Therefore, optimizing memory is necessary, and caches are one such method.
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\inlineex The importance of caches can quickly be seen when looking at the memory hierarchy:
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\begin{tabular}{llllll}
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\toprule
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\textbf{Cache type} &
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\textbf{What is cached?} &
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\textbf{Where is it cached?} &
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\textbf{Latency (cycles)} &
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\textbf{Managed by} \\
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\midrule
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Registers &
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4/8-byte words &
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CPU core &
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0 &
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Compiler \\
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TLB &
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Address translations &
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On-chip TLB &
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0 &
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Hardware \\
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L1 cache &
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64-byte blocks &
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On-chip L1 &
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1 &
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Hardware \\
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L2 cache &
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64-byte blocks &
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On-chip L2 &
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10 &
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Hardware \\
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Virtual memory &
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4\,kB page &
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Main memory (RAM) &
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100 &
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Hardware + OS \\
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Buffer cache &
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4\,kB sectors &
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Main memory &
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100 &
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OS \\
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Network buffer cache &
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Parts of files &
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Local disk, SSD &
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1{,}000{,}000 &
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SMB/NFS client \\
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Browser cache &
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Web pages &
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Local disk &
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10{,}000{,}000 &
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Web browser \\
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Web cache &
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Web pages &
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Remote server disks &
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1{,}000{,}000{,}000 &
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Web proxy server \\
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\bottomrule
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\end{tabular}
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