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[SPCA] Fix typos

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Janis Hutz
2026-01-26 17:07:49 +01:00
parent 181ce77fe7
commit fe9dc3344d
2 changed files with 1 additions and 1 deletions
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semester3/spca/parts/00_asm/00_intro.tex
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@@ -5,7 +5,7 @@ Notable examples are \texttt{x86}, \texttt{RISC-V} (this one is open-source!), M
\texttt{x86}-Assembly files usually use the file extension \texttt{.s} or \texttt{.asm} \texttt{x86}-Assembly files usually use the file extension \texttt{.s} or \texttt{.asm}
Most CPU architectures (including \texttt{x86}, most \texttt{ARM} and base \texttt{RISC-V} implementations) are little endian (also sometimes called right-to-left or right-aligned) Most CPU architectures (including \texttt{x86}, most \texttt{ARM} and base \texttt{RISC-V} implementations) are little endian (also sometimes called right-to-left or right-aligned)
and thus have the LSB on at the lowest address. and thus have the LSB at the lowest address.
\fancydef{Microarchitecture} The implementation of the ISA. It defines the actual hardware layout and how the individual instructions are actually implemented \fancydef{Microarchitecture} The implementation of the ISA. It defines the actual hardware layout and how the individual instructions are actually implemented
and thus also defines things such as core frequency, cache layout and more. and thus also defines things such as core frequency, cache layout and more.

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semester3/spca/spca-summary.pdf
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