diff --git a/semester3/spca/parts/00_asm/03_operations/02_condition-codes.tex b/semester3/spca/parts/00_asm/03_operations/02_condition-codes.tex
index 16faddd..c14488c 100644
--- a/semester3/spca/parts/00_asm/03_operations/02_condition-codes.tex
+++ b/semester3/spca/parts/00_asm/03_operations/02_condition-codes.tex
@@ -20,6 +20,9 @@ and \texttt{OF} is set as above, where \texttt{t = a - b}.
 Another instruction that is used is \texttt{testX src2, src1} (X again a size postfix, easier: \texttt{testX b, a}), and acts like computing \texttt{a \& b} and where \texttt{ZF} is set if \texttt{a \& b == 0}
 and \texttt{SF} is set if \texttt{a \& b < 0}.
 
+\inlineex Assume \texttt{x = src1}, \texttt{y = src2} in \texttt{cmpl y, x}. Then, when you use the condition codes with \texttt{cmovle},
+the instruction is executed only if $x \leq y$ (i.e. the operands of the compare instructions in the AT\&T syntax are flipped)
+
 \content{Zeroing register} We can use a move instruction, but that is less efficient than using \texttt{xorl reg, reg},
 where \texttt{reg} is the 32-bit version of the reg we want to zero. This works because on 32-bit operations,
 the upper 32 bit of the 64 bit register will be zeroed.
diff --git a/semester3/spca/parts/04_exam.tex b/semester3/spca/parts/04_exam.tex
new file mode 100644
index 0000000..cebbbab
--- /dev/null
+++ b/semester3/spca/parts/04_exam.tex
@@ -0,0 +1 @@
+As of HS2025, the following things can be expected at the exam:
diff --git a/semester3/spca/spca-summary.pdf b/semester3/spca/spca-summary.pdf
index 72a76b3..43f8d0b 100644
Binary files a/semester3/spca/spca-summary.pdf and b/semester3/spca/spca-summary.pdf differ