[SPCA] Fixes a few errors

semester3/spca/parts/00_asm/03_operations/02_condition-codes.tex

@@ -20,6 +20,9 @@ and \texttt{OF} is set as above, where \texttt{t = a - b}.
 Another instruction that is used is \texttt{testX src2, src1} (X again a size postfix, easier: \texttt{testX b, a}), and acts like computing \texttt{a \& b} and where \texttt{ZF} is set if \texttt{a \& b == 0}
 and \texttt{SF} is set if \texttt{a \& b < 0}.
 
-\content{Zeroing register} We can use a move instruction, but that is less efficient than using \texttt{xorl reg, reg}, where \texttt{reg} is the 32-bit version of the reg we want to zero.
+\content{Zeroing register} We can use a move instruction, but that is less efficient than using \texttt{xorl reg, reg},
+where \texttt{reg} is the 32-bit version of the reg we want to zero. This works because on 32-bit operations,
+the upper 32 bit of the 64 bit register will be zeroed.
 
-\content{Reading condition codes} To read condition codes, we can use the \texttt{setC} instructions, where the \texttt{C} is to be substituted by an element of table \ref{tab:condition-codes}
+\content{Reading condition codes} To read condition codes, we can use the \texttt{setC} instructions,
+where the \texttt{C} is to be substituted by an element of table \ref{tab:condition-codes}